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author | stefan <stefan@s00.xyz> | 2023-04-08 20:42:18 -0400 |
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committer | stefan <stefan@s00.xyz> | 2023-04-08 20:42:18 -0400 |
commit | 1aac36f788834699b6891aea7a83eb950bd5e8f6 (patch) | |
tree | 18e0a6c26b83e71c101193e60149f49b1641daf0 /sys/include/asm.h | |
parent | a1a97aa7b2b0c3d1f3b6766446d605f83de1c561 (diff) | |
download | sv-1aac36f788834699b6891aea7a83eb950bd5e8f6.tar.gz |
no idea whot i changed lol
Diffstat (limited to 'sys/include/asm.h')
-rw-r--r-- | sys/include/asm.h | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/sys/include/asm.h b/sys/include/asm.h new file mode 100644 index 0000000..86e6354 --- /dev/null +++ b/sys/include/asm.h @@ -0,0 +1,55 @@ +#ifndef _ASM_H +#define _ASM_H + +#include <stdint.h> + +#define SSTATUS_SIE (1L << 1) + +static inline uint64_t +csrr_sstatus(void) +{ + uint64_t x; + asm volatile("csrr %0, sstatus" : "=r"(x)); + return x; +} + +static inline void +csrw_sstatus(uint64_t x) +{ + asm volatile("csrw sstatus, %0" : : "r"(x)); +} + +/* will enable all supervisor interrupts using the bit in sstatus */ +static inline void +sie_enable(void) +{ + csrw_sstatus(csrr_sstatus() | SSTATUS_SIE); +} + +/* will disable all supervisor interrupts by using the bitin sstatus (though sie can also be used) */ +static inline void +sie_disable(void) +{ + csrw_sstatus(csrr_sstatus() & ~SSTATUS_SIE); +} + +/* returns the status of the sie bit in sstatus + * 1 if enabled, 0 if disabled. + * for more specific info see the sie register + */ +static inline uint64_t +sie_status() +{ + return (csrr_sstatus() & SSTATUS_SIE) != 0; + +} + +/* we use tp to store hartid */ +static inline uint64_t +read_tp(void) +{ + uint64_t x; + asm volatile("addi %0, tp, 0" : "=r"(x)); +} + +#endif /* _ASM_H */ |